FPGA · SoC · DSP

Engineering deep-dives for FPGA & SoC developers.

Hands-on tutorials, application notes and open-source tools for FPGA design, System-on-Chip and digital signal processing.

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Implementing a Single-Precision Floating-Point Biquad on Versal

In my daily work, y I often need to implement digital filters on FPGAs, and since I usually work with 7 Series FPGA, all my filters are designed using fixed-point arithmetic. Is true that I can implement floating-point arithmetic using those FPGAs, but it would be an overkill in terms of resource...

Published by Pablo on Jun 7, 2026

CryptoliteICE: an Open-Source FPGA-Based TRNG

One of the missions of an engineer, is selects the device that fits better for a project. In the case of FPGA engineers, of even any embedded software engineer, many times we tend to use always the same devices because we feel comfortable with them, we have experience with them, the toolchain con...

Published by Pablo on May 24, 2026

Building PetaLinux for a Versal-Based Board

This week I have been busy working on my talk in the next FPGA Developer’s Forum, which will be focused on the AMD Versal architecture and the iWave iG-G57M SOM. As part of the preparation, I needed to build a PetaLinux image for the board, which is a common task for anyone working with embedded ...

Published by Pablo on May 10, 2026

Exploring Versal ACAP with the iG-G57D Board

I have been using Zynq7000 and Zynq MPSOC devices for years, but I had not had the chance to work with AMD’s latest adaptive platform, Versal ACAP, until now. A few weeks ago, the iG-G57D board, based on the Versal AI Edge VE2302, landed into my desk thanks to iWave Global.

Published by Pablo on Apr 26, 2026

Getting started with Agilex 3 and floating-point DSP operations

I have been working with Xilinx (now AMD) FPGAs for years, so when the Agilex 3 FPGA and SoC C-Series Development Kit landed on my desk I knew the transition would involve some hard changes. I used Quartus in my University days with a Terasic kit based on a Cyclone II (DE2) and later a Cyclone IV...

Published by Pablo on Apr 12, 2026

Remote FPGA verification of DSP algorithm using STEMlab 125-14 PRO Gen 2

When I was in the university. I remember my FPGA professor saying how important is to simulate our designs. To be honest, in that moment simulations were something boring and I just wanted to get an FPGA development board and test the design in the real hardware (I came from the microcontrollers ...

Published by Pablo on Mar 29, 2026

Red Pitaya STEMlab 125-14 PRO Gen 2: Analysis of an audio signal modulated using PWM

I know Red Pitaya almost since its Kickstarter campaign, and I have been using it for a while now. It is one of those boards that you can bring always with you, actually I have an old one and it came always in my bag. Born as a Kickstarter project back in 2013, it started as an open-source measur...

Published by Pablo on Mar 15, 2026

Application Notes

[AN001] Designing from zero an IIR filter in Verilog using biquad structure and bilinear discretization.

Filtering is likely the most common DSP algorithm that any embedded engineer has to design, no matter it they are developing for an STM32, or TI DSP or, of course, en FPGA. Filtering is such important because the majority of the applications are connected to the real world, so they need to captur...

[AN002] Running subcycle average models on Speedgoat Performance System.

Materials like Silicon Carbide (SiC) or Gallium Nitride (GaN) are making our power electronics converters faster and faster. This means small inductors and capacitors that make, in most cases, the cost of the devices decrease. This also means that the control devices also have to be faster, and n...