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AI-assisted testbench Generation for FPGA Designs

I use AI every day, especially for documenting and learning. Last week I was testing an SPI slave and wondered how a testbench generated by AI would work. A few options came to mind: would a black-box test be better? A gray-box test? What about giving the AI all the code and asking it to generate...

Published by P. Trujillo on Nov 23, 2025

Receiving ADS-B (1090 MHz) with a USRP B206mini-i and GNU Radio

Disclaimer: This article is provided for educational and research purposes only. Any signal capture, analysis, or related activity should be performed exclusively in a controlled lab environment and in full compliance with applicable laws and regulations. The author assumes no responsibility o...

Published by P.Trujillo on Nov 9, 2025

Using the PolarFire SoC Cryptographic Processor

FPGAs and SoCs are becoming essential assets in our daily lives. From AI to real-time systems, they power many of today’s technological advances. As a result, they store sensitive data and can be targets for third-party attacks, but they are also built to handle these new scenarios.

Published by P.Trujillo on Oct 26, 2025

MicroBlaze-V on Spartan UltraScale+.

The Spartan UltraScale+ platform is currently AMD’s darling. At the FPGA events I attended this summer, the SCU35 had a special place — especially at the recent FPGA Horizons, where this board could be found not only at the AMD booth but also at AVNET’s booth.

Published by P.Trujillo on Oct 12, 2025

Getting Started with the SCU35 and Spartan Ultrascale+

Spartan UltraScale+ has been officially released, and AMD has provided a development board to help engineers get familiar with this device. The board is called the SCU35.

Published by P.Trujillo on Sep 27, 2025

FPGA Security Features: Protecting Your Bitstreams and Designs

Again, we are under attack, and our FPGA designs are not an exception. When someone talks about hostile environments, usually we think of wars, a nuclear reactor, or Jupiter; however, a hostile environment is everywhere outside our office or factory. Let me explain this.

Published by P.Trujillo on Sep 14, 2025

Sending PL overlays from Ubuntu in the KR260

PetaLinux is probably the go-to OS when working with Zynq devices. It makes life easy because it is built for these chips and comes with plenty of pre-configured Yocto layers that take care of most of the setup for you. But here is the catch: AMD itself has said that PetaLinux is not meant to be ...

Published by P.Trujillo on Aug 31, 2025

Application Notes

[AN001] Designing from zero an IIR filter in Verilog using biquad structure and bilinear discretization.

Filtering is likely the most common DSP algorithm that any embedded engineer has to design, no matter it they are developing for an STM32, or TI DSP or, of course, en FPGA. Filtering is such important because the majority of the applications are connected to the real world, so they need to captur...

[AN002] Running subcycle average models on Speedgoat Performance System.

Materials like Silicon Carbide (SiC) or Gallium Nitride (GaN) are making our power electronics converters faster and faster. This means small inductors and capacitors that make, in most cases, the cost of the devices decrease. This also means that the control devices also have to be faster, and n...